Tutorial Overview
- Early Bird Registration Deadline: 22 Feb, 2024 (extended).*Update (Apr 19): Tutorial T7, T9 are cancelled due to unforeseen circumstances; T10 is moved to Morning Session.
Full Day Tutorial
T1 - Mixed-Signal RF Transmitters
Instructor(s):
Abstract/Information:
For nearly 100 years, RF transmitter frontends have been dominated by linear analog mixing architectures. Meanwhile, in the era of integration, the transistor has been optimized for small area and low resistance switching. Hence, radio architectures that exploit more the switching performance of the transistor should be considered. Digital power amplifiers operating in resistance-mode as programmable inverse-class-D amplifiers and in the voltage-mode as class-D amplifiers (e.g., Switched-Capacitor Power Amplifiers (SCPAs)) have been extensively proposed and investigated recently, as a potential solution to the aforementioned architectural transformation in wireless transmitters. However, these transmitters do not have myriad textbooks detailing their operation that are available for more traditional analog based transmitters. These switched-mode transmitters require operation from the digital baseband to the antenna interface and hence require strong multi-disciplinary skills from digital signal processing to RF impedance matching. It is anticipated that such mixed-signal transceivers will only become more popular in the era of 6G, where support for multi-band and multi-mode operation is critical, and where a shift back to centimeter wave spectrum will again make mixed-signal transmitters more competitive. Hence, a tutorial that focuses not only on operation principles, but also on simulation and design methodology of mixed-signal transmitters is called for. In the proposed tutorial, the speakers will focus on the switched-capacitor power amplifier, however, other mixed-signal transmitters will also be covered and the attendee to the tutorial will learn the basics required to begin their own designs and also learn of case studies detailing recent, specific implementations.
T2 - Advanced Biomedical Imaging Technologies: Circuit Design and Techniques
Instructor(s):
Abstract/Information:
This tutorial series provides a comprehensive exploration of four cutting-edge biomedical imaging technologies: radar and ultrasound, electrical impedance tomography, functional near-infrared spectroscopy, and magnetic resonance imaging. Delving into the heart of circuit design and imaging techniques, participants will gain invaluable expertise in harnessing these technologies for practical applications in healthcare and diagnostics. By the end of the tutorials, attendees will be equipped to drive innovation in the field, leading the way towards enhanced medical imaging and superior patient care.
T3 - Integrated Devices, Circuits and Systems for Quantum Computing
Instructor(s):
Abstract/Information:
Quantum Computing is a most far-reaching and challenging emerging technology. The control and readout of the fundamental properties of matter at atomic scale, such as spin, superposition, entanglement and decoherence will radically transform the future technology developments and science discoveries. This tutorial addresses the fundamentals and case studies of the emerging quantum devices and modeling, simulation and design of cryogenic CMOS integrated ultra-scaled devices, circuits and systems for quantum computing.
Half Day Tutorial (Morning)
T4 - More Efforts to Developing High-Performance PLLs with Jitter Reduction Approaching Sub-10fs
Instructor(s):
Abstract/Information:
This tutorial will present how to realize the simultaneous reduction of jitter and spur of the recent phase-locked loops (PLLs) being applied to ultra-high-speed communication systems, involving the past, present, and future of devising various circuit techniques. Next, the key limitations of jitter-spur performance for the classical PLLs will be studied and summarized, and how to break jitter-spur tradeoffs in different PLL variants exhibiting better figure-of-merit will be elaborated via several design examples fabricated in the CMOS process. Then, the potential paths to continuously pursue ultra-low jitter by fully leveraging the architectural advantages of every PLL will be summarized and discussed.
T5 - Energy-Efficient AI-Native Wireless Communication Systems
Instructor(s):
Abstract/Information:
Artificial Intelligence is revolutionizing different areas of our lives. Indeed, Artificial Intelligence could be a major disruptive change in the way we design, standardize and exploit communications systems. A novel paradigm where the communication system is natively powered by Artificial Intelligence is presented in this tutorial. We also emphasize the challenges for AI-accelerators and ASIC design in terms of the computational performance and energy efficiency demanded by AI-native communications systems.
T6 - Advanced Mixed Signal Concepts and Circuit Innovations Exploiting Active Bulk-Driven Techniques using 22nm FD-SOI CMOS Technology (22FDX)
Instructor(s):
Abstract/Information:
This tutorial starts with an in-depth introduction to the fully-depleted silicon-on-insulator technology (FD-SOI), normal techniques and flipped-well transistors and including all relevant technology parameters of the bulk node. Next an overview of the most recent design innovations in the field of analog and mixed-signal circuits and systems employing static or dynamic transistor-body biasing techniques are presented. Cutting edge circuit performance in terms of DC gain, bandwidth, linearity and power-efficiency is mathematically analyzed and verified by simulations and measurements when taking advantage of dynamic as well as static body-biasing architectures.
T8 - Tensor Regression: Methods and Applications
Instructor(s):
Abstract/Information:
Regression analysis is a key area of interest in the field of data analysis and pattern recognition, which is devoted to exploring the dependencies between variables. For example, one can predict the future climate state from previous recordings or infer human age from their corresponding facial images. However, traditional modeling methods rely on representation and computation in the form of vectors and matrices, where the multidimensional signal needs to be unfolded for subsequent processing. The multilinear structure would be lost in such vectorization or matricization, which leads to suboptimal performance.
Tensors, as high-dimensional extensions of vectors, are considered natural representations of high-dimensional data. Driven by the recent advances in applied mathematics, it is natural for us to move from classical matrix-based methods to tensor-based methods for better performance and dimensionality reduction. In many fields, such as sociology, climatology, geography, economics, computer vision, chemometrics, and neuroscience, tensor regression has been widely employed and proven useful. This tutorial will provide you with a thorough overview of tensor-based regression methods and their applications. It is intended for researchers, developers, engineers, students, and people interested in gaining an overall understanding of tensor-based learning methods and their applications in data processing.
T10 - Using Neural Networks to Optimize the Design of Analog and Mixed-Signal Circuits and Systems
Instructor(s):
Abstract/Information:
This tutorial shows how to use Artificial Neural Networks (ANNs) for the optimization and automated design of analog and mixed-signal circuits. A survey of conventional and computational-intelligence design methods is given as a motivation towards using ANNs as optimization engines. A step-by-step procedure is described, explaining the key aspects to consider in our approach, such as dataset preparation, ANNs modeling, training, and optimization of network hyperparameters. As an application, two case studies at different hierarchy levels are presented. The first one is the system-level sizing of Sigma-Delta Modulators (ΣΔMs), where ANNs are combined with behavioural simulations to generate valid circuit-level design variables for a given set of specifications. The second example combines ANNs with electrical simulators to optimize the circuit-level design of operational transconductance amplifiers.
The presented methodology is described in a didactic way, and the contents are organized to learn the fundamentals and practical considerations behind the use of ANNs for automated design of analog circuits. No prerequisites are needed and the tutorial contents are organized and addressed for a general audience attending ISCAS.
Half Day Tutorial (Afternoon)
T11 - How to Model the Training and Inference of Analog-Based In-Memory Computing (AIMC) Systems
Instructor(s):
Abstract/Information:
AIMC is a promising approach to reduce the latency and energy consump6on of Deep Neural Network (DNN) inference and training. However, the noisy and non-linear device characteristics, and the non-ideal peripheral circuitry in AIMC chips, require adapting DNNs to be deployed on such hardware to achieve equivalent accuracy to digital computing. While traditional SPICE-based simulations can be used to model these systems, they require a significant number of resources, and are typically not feasible to run for large and complex DNNS, such as Large Language Models (LLMs) that currently dominate the Deep Learning (DL) landscape. Instead, customized simulation frameworks can be used to efficiently and accurately model key circuit and device behavior. The IBM recently released IBM Analog Hardware Acceleration Kit (AIHWKit), freely available at https://github.com/IBM/aihwkit, is one such framework capable of performing inference and training of DNNs using AIMC. In this tutorial, we provide a deep dive into how inference and training can be performed using the AIHWKit, and how users can expand and customize AIHWKit for their own needs.
Participants will be equipped with practical skills to model the training and inference of complex analog in-memory computing systems, using models developed from experimental data.
T12 - Machine Learning for Automated Physical Design
Instructor(s):
Abstract/Information:
Electronic design automation (EDA) is a crucial process in the development of electronic systems, but it can be time-consuming and labor-intensive. Machine learning, particularly deep learning, has the potential to significantly improve the accuracy, speed, efficiency, and reliability of EDA tasks such as circuit simulation, layout design, and optimization. In this tutorial, we will provide a structured overview of current research on the application of machine learning in EDA, including key concepts, use cases, design phases, representation structures, and problem formulations. We will also discuss the formats and organizational structures for circuit data that are commonly used in this field. By the end of the tutorial, attendees will have a better understanding of the state of the art in machine learning for EDA and will be equipped with the knowledge and tools to pursue their research in this area.
T13 - New Era of Artificial Intelligence: Unleashing the Power of Large Models in Visual Applications
Instructor(s):
Abstract/Information:
In today's rapidly advancing technological landscape, the significance of large-scale vision generative and foundation models has never been more pronounced. These models represent a pivotal leap forward in our ability to understand and manipulate visual information. With applications spanning from creative fields like art and entertainment to critical domains like medical imaging and autonomous systems, these models have the potential to revolutionize how we interact with and interpret visual data.
However, the transition from theoretical excellence to practical implementation in the real world is fraught with intricacies. Closing the gap between their inherent potential and tangible applications remains a significant challenge. This raises the pivotal question: how can we systematically construct and effectively employ these large models, and can they, in turn, serve as a wellspring of inspiration and support for other tasks, such as image processing and multi-model applications? This tutorial is designed to offer a clear roadmap, illuminating both the promise and potential challenges associated with leveraging large-scale models to address diverse challenges across various domains.
T14 - Hardware Security for Biomedical Circuits and Systems
Instructor(s):
Abstract/Information:
The objective of this tutorial is to give the ISCAS audience an up-to-date overview of hardware security challenges in biomedical circuits and systems. The targeted audience is the ISCAS community of professionals and graduate students who are interested in the cybersecurity of biomedical circuits and systems, including implantable medical devices, wearable drug delivery systems, and neurostimulators. More specifically, the tutorial will focus on the hardware security challenges of such devices and the ways to achieve a hardware root of trust for their long-term operation, especially in the case of implantable devices. Topics of particular interest include protection of biomedical integrated circuits through logic locking, resiliency against hardware trojans, and countermeasures against side channel attacks. Emerging embedded system design frameworks that are secure by construction, e.g., zero-trust methodologies, will be highlighted in terms of their relevance to securing the embedded systems of biomedical devices. The tutorial will include hands-on experiments on the Chipwhisperer hardware hacking platform, and attendees will get the opportunity to implement power side channel attacks to reveal authentication and access crypto keys on microcontrollers that are commonly used in embedded biomedical devices.
T15 - Towards Battery-free and Low-cost Distributed Sensor Node: from Novel IC Approaches to System-level Industrial Design
Instructor(s):
Abstract/Information:
The vision of a world where pervasive integrated electronic systems are fully interconnected to collect, process, and exchange information leads to a significant growth trend in the global smart sensor market. However, powering Internet of Things (IoT) infrastructures of one trillion nodes with batteries poses considerable maintenance and management costs. In the framework of this increasing trend, this tutorial will highlight innovative circuital and systems-level strategies and techniques to drastically reduce power consumption and build battery-less and energy-autonomous electronic devices.
The first part of the tutorial focuses on the low-cost and low-power consumption requirements for energy-efficient IC design. These demand a small area, low design effort, digital-like shrinkage across CMOS generations, and design/technology portability. Moreover, the possibility to exploit the digital (automated) design flow even for analog building blocks can dramatically reduce the design effort of any system-on-chip enabling aggressively supply-voltage scaled and/or regulator-less building blocks that can be powered directly from energy harvesters. The second part of the tutorial will show a system-level industrial overview. In particular, it explores the research progress in sustainable wireless sensor nodes that require minimal or no maintenance. Additionally, how RF power transfer (WPT) can be a convenient way to remotely power wireless nodes, especially if installed in hard-to-reach places, will be shown.